Formal Verification Lead Engineer, Silicon
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with formal model checking for ASICs and FPGAs, SystemVerilog and SystemVerilog Assertions.
- Experience with formal verification EDA tools.
- Experience with model checking frameworks such as Murphi or TLA+.
Preferred qualifications:
- Master's or PhD degree in Computer Science, Electrical Engineering, or a related field.
- Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, 360-DV.
- Experience with a scripting language like Perl, Tcl or Python.
- Experience with propositional logic, theorem proving and tools such as Z3.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Partner with hardware architects for formal specifications and verification of system-level properties.
- Develop highly abstract models of various designs and prove architectural correctness within a model and consistency across models.
- Plan formal verification strategy, create the properties and constraints for complex digital design blocks.
- Translate system-level formal specifications into precise constraints for individual logical blocks.
- Architect and implement reusable formal verification components.
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