Custom Design Static Timing Analysis Engineer, Silicon
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, a relevant technical field, or equivalent practical experience.
- 5 years of experience in static timing analysis with mixed- signal designs.
- Experience in timing flow methodology and development.
- Experience in HSPICE, Nanotime, Liberate, Silicon Smart, or Virtuoso.
- Experience in coding using Perl, Python, TCL scripting languages.
Preferred qualifications:
- Master's degree or PhD in Computer Science, Electrical Engineering, or a related field.
- Experience with STA on Analog/mixed signal designs.
- Experience with IP collateral generation/QA.
- Experience in Cadence/Synopsys tools.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Perform (Static Timing Analysis) STA on mixed-signal designs to verify that all timing requirements are met. This involves analyzing the timing of digital paths within the chip.
- Develop and maintain STA constraints and scripts.
- Create and maintain accurate timing constraints for the entire chip, including both digital and mixed-signal portions.
- Ensure that constraints are consistent with the design specifications.
- Develop flow and methodology for IP collateral generation and Quality Assurance (QA) checks.
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